Development of FPGA Based CAN Bus Error Generator System
نویسندگان
چکیده
This paper introduces the development and architecture of an FPGA based communication error generator system for CAN (Controller Area Network) networks. The created test-system is able to receive and interpret the frames on the network and capable to modify the user specified part of these messages on bit level in real-time. Beside of these modifications the environment has to be feasible to generate physical level error.
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تاریخ انتشار 2014